Without limiting the scope of the invention, its background is described in connection with the manufacture of silicon chips for use in fixed-focus optical packaging, as an example.
Heretofore, in this field, the production of silicon chips for use in optical detection systems has failed to address the need for the higher tolerances required for the detection of higher quality images. For example, present methods of manufacturing fixed-focal length optical devices require manual intervention by the operator to position and focus the lens optics.
In current electro-optical packaging of image sensors the distance from the lens to the sensor (silicon) surface is critical to the correct focus of the image on the sensor plane. Control of this height must be accurate to within +/-30 .mu.m and results in a higher quality image.
Manual adjustment adds costs due to the expense in equipment and personnel, and because it is a multi-step process. First, the lens must be positioned on the lens support structure and the lens adjusted in the proper focal plane. Once the lens has been adjusted, it must be fixed to the support structure or to the integrated circuit package containing the silicon chip.
Manual adjustment at both the adjustment and fixation steps adds to the overall cost of manufacturing of fixed-focal length digital optics in terms of the lens mount because the optics must be adjustable. Manual adjustment also requires that a threaded fitting is located in the lens support structure. Manual adjustment also adds to the overall cost of manufacturing due to the time spent adjusting and fixing the focus of the lens optics.
U.S. Pat. No. 4,782,288 (SGS Microelettronica S.p.A.) discloses a method for evaluating processing parameters in the manufacture of semiconductor devices, utilizing measurements such as width of lines created with lithographic techniques. In the disclosed method, a current of a known value is applied to a pair of reference resistive arms and a pair of test resistive arms, the voltages in each pair are measured, and the difference in conductance between the reference arms and the test arms is calculated. The specification does not address the need for achieving higher tolerances by monitoring the height of the encapsulation material in a semiconductor device relative to the silicon surface.
U.S. Pat. No. 4,406,949 (Mostek Corporation) discloses a method and apparatus for aligning an integrated circuit in which a laser beam is precisely focused onto a target surface of an integrated circuit in order to burn out the conductive lines of a specific circuit known to be defective, without harming the integrity of nearby conductive lines and circuit elements. The achieved result is the saving of a die on a wafer which would normally be discarded absent repair of the defect. The invention teaches detection of target structures and calculation of the distances between the structures, which are compared to desired parameters to effect rapid and precise focusing of the laser beam. The specification does not address the need for achieving higher tolerances by monitoring the height of the encapsulation material in a semiconductor device relative to the silicon surface.
A need has developed for a packaging solution that provides a package whose height is accurately controlled relative to the silicon surface. A packaging solution that allows for accurate control over the relative height of the lens over the silicon chip would eliminate the need of adjustable lenses and the focus step in the production process, leading to lower cost fixed-focus camera systems.
The present invention addresses the present needs by providing an apparatus and method for monitoring, controlling and adjusting the height of a lens support structure above the top surface of a substrate or silicon chip. The present invention allows the user to monitor the height of the plastic package over a silicon chip whose sidewalls are at a controlled height relative to the silicon surface. The control over the height is achieved at very high tolerances. The present invention accomplishes these high tolerances using present integrated circuit packaging methods of manufacture and equipment through the use of a polishing operation that polished down the height of the plastic package until it has reached the desired height above the silicon surface. The present invention uses height detection wires attached directly to the silicon surface on dedicated bonding pads during the normal bonding procedure to achieve the results disclosed herein.